Counting in Uniform Tc 0 3

In this paper we rst give a uniform AC 0 algorithm which uses partial sums to compute multiple addition. Then we use it to show that multiple addition is computable in uniform TC 0 by using count only once sequentially. By constructing bit matrix for multiple addition, we prove that multiple product with poly-logarithmic size is computable in uniform TC 0 (by using count k + 1 times sequentially when the product has size O((logn) k)). We also prove that multiple product with sharply bounded size is computable in uniform AC 0. 1. Introduction In this paper we study basic counting techniques inside uniform TC 0. We adopt function algebraic approach, for it requires less background and has more mathematical (or at least machine-independent) favor. The study of complexity classes related to parallel computation is nowadays more important since parallel computing is thought to be useful. In theoretical computer science there are several well-developed parallel models. We will focus on Boolean circuits because remarkable separation results 11],,17] are based on it. Recall that AC 0 is the class of predicates computable by polynomial size, constant depth, unbounded fan-in circuits with gates AND; OR; NOT. Majority gate is deene as follows: MAJ(x) = 1 if at least a half bits in the binary string x are 1's, else MAJ(x) = 0. TC 0 is the class of predicates computable by polynomial size, constant depth, unbounded fan-in circuits with gates AND; OR; NOT; MAJ. In the 80's, two important separation results were proved. The rst result is the separation of AC 0 and AC 0 (p), where p is a prime and AC 0 (m) is AC 0 plus modular m counting gates. 9], 1] gave superpolynomial lower bounds for the size of circuits computing parity in AC 0. (Later 18], 11] proved exponential lower